Programming Guide

This section provides the details of the programming requirements to operate the M.2 M-key Stack FMC hardware and customise functionality.


The 2K EEPROM is intended to store information that identifies the mezzanine card and also specifies the power supplies required by the card. This information is typically read by the system power management on the carrier board when it is powered up. In typical user applications, it should not be necessary to read the data on the EEPROM, and we highly recommend against writing to the EEPROM.

As the M.2 M-key Stack FMC does not make use any of the FMC I/O signals, it does not require any particular voltage level to be applied to VADJ. The EEPROM was included on the mezzanine card to satisfy the VITA 57.1 standard and to ensure compatibility with all standard FMC carriers. The EEPROM is programmed to accept a VADJ voltage between 1.2V and 3.3V.

Address switching

The I2C address of the EEPROM is switched between 0x50 and 0x54, by use of the device’s A2 input pin. The device’s address depends on the presence of a second mezzanine card “stacked” on top of the M.2 M-key Stack FMC. Switching of the I2C address of the EEPROM is necessary to avoid a bus conflict with the second mezzanine card’s EEPROM.

When a second mezzanine card is “stacked” onto the M.2 M-key Stack FMC, it is the second mezzanine card’s EEPROM that will determine the VADJ voltage provided by the carrier board. To prevent the power controller from reading the EEPROM of the M.2 M-key Stack FMC in this case, it detects when a second mezzanine card is present (using the PRSNT_M2C_L signal) and changes it’s own EEPROM’s address by driving it’s A2 input HIGH.

Address without 2nd mezzanine

The EEPROM address when the M.2 M-key Stack FMC is used without a second mezzanine card.


Address with 2nd mezzanine

The EEPROM address when a second mezzanine is attached.


The FMC pins of the EEPROM’s I2C bus are shown below, and it is up to the user to determine their corresponding connections to the FPGA/MPSoC on the carrier board being used.

I2C bus signalFMC pin nameFMC pin number
SCL (clock)SCLC30
SDA (data)SDAC31


The Opsero FMC EEPROM Tool can be used to verify, reprogram or update the EEPROM contents of Opsero FMC products using an FPGA or MPSoC board such as the ZCU102 or VCU118 board.

Supported boards

The tool currently supports the following FPGA/MPSoC boards. You must have at least one of these boards in order to use the tool.


The tool can be downloaded at the link below:

Opsero FMC EEPROM Tool v1.5

The zip file contains a boot file (bitstream or BOOT.bin) for each of the supported boards.

Usage instructions

To run the tool, follow these steps:

  1. Plug the FMC card you wish to reprogram into one of the FMC connectors of your FPGA/MPSoC board. The tool is designed to probe all of the FMC connectors on the FPGA/MPSoC board.

  2. If you are using the ZedBoard, be sure to set the VADJ jumper setting to 1.8V. If you are using the KC705, be sure that your FMC card can support a VADJ of 2.5V, which is the default setting of that board.

  3. Connect the UART of your FPGA/MPSoC board to a PC.

  4. For Zynq and Zynq MP boards, a BOOT.bin file is provided. Copy this file to your board’s SD card and configure it to boot from SD card. Then plug the SD card back into the board and power it up.

  5. For FPGA boards, a bitstream is provided with an embedded ELF file. Power up your FPGA/MPSoC board and then download the bitstream to the FPGA board using the Vivado Hardware Manager tool.

  6. Open a terminal program such as Putty and connect to the serial port of your FPGA/MPSoC board. If you see nothing in the terminal window, press ENTER to redisplay the menu.

  7. Use the menu options to do the following:

    • Program the EEPROM (p)
      You will be asked to select the FMC product from a list, and also to enter the product’s serial number. Note that entering incorrect information here can lead to your FMC card being damaged by a VADJ voltage that is greater than it’s true rating. If you are not sure about the product to select here, please contact Opsero first.

I/O Expander

As the M.2 M-key Stack FMC passes through all I/O (except gigabit transceivers) to the second mezzanine card, it has an I/O expander ( TI, IO Expander, TCA9536DTMR ) to allow the FPGA/MPSoC board to control each M.2 module’s reset signal (PERST_A# and PERST_B#) over the I2C bus. The I/O expander can also be used to read the PRSNT_M2C_L signal that indicates whether a second mezzanine card is present. An illustration of the I/O expander’s connections is provided in the I2C section. More detailed information regarding the use of the I/O expander can be found in the datasheet .

I2C address

The I/O expander can be accessed over the I2C bus using the address 0x41.


I2C registers

The table below lists the registers of the I/O expanders.

0x00Input portR
0x01Output portRW
0x02Polarity inversionRW
0x50Special functionRW

For registers 0x00, 0x01, 0x02 and 0x03, the bits 0 to 3 refer to the expander’s IOs: P0, P1, P2 and P3.


The I/O expanders have 4x GPIOs, labelled P0, P1, P2 and P3. On the M.2 M-key Stack FMC, these I/Os are connected as follows:

Expander I/O pinBit maskConnects toDescription
P00x01PERST_A#M2 Slot 1 reset (active-low)
P10x02PERST_B#M2 Slot 2 reset (active-low)
P20x04PRSNT_M2C_L2nd Mezzanine present
P30x08Not connected

All of the I/O expander GPIOs default to inputs on power-up. The PERST_A# and PERST_B# signals are connected to pull-up resistors, to ensure that the M.2 modules are released from reset on power-up, even if the FPGA/MPSoC has not configured the I/O expander. Most applications can leave the I/O expander in it’s default configuration.