Programming Guide

This section provides the details of the programming requirements to operate the FPGA Drive FMC Gen4 hardware and customise functionality.

IBERT testing

The FPGA Drive FMC Gen4 comes with 2x M.2 loopback modules. These modules can be used to test the combined signal integrity of the carrier and mezzanine card, and can be useful when debugging issues on custom boards. To illustrate the use of the M.2 loopback modules with IBERT, we have put together the following videos.

Part 1: Hardware setup

How to attach the M.2 loopback modules and prepare your hardware for the IBERT loopback test.

Part 2: Using IBERT in Vivado

Download the pre-built IBERT bitstream:

Try this: disable the DFE (decision feedback equalizer) when doing a 2D eye scan – the gigabit traces on the FPGA Drive FMC have very low losses, so the performance is generally better without the DFE.

Part 3: Generate your own IBERT

How to generate an IBERT bitstream for your own hardware if you don’t find a pre-built bitstream listed above.

EEPROM

The 2K EEPROM is intended to store information that identifies the mezzanine card and also specifies the power supplies required by the card. This information is typically read by the system power management on the carrier board when it is powered up. In typical user applications, it should not be necessary to read the data on the EEPROM, and we highly recommend against writing to the EEPROM. Nevertheless, if you wish to access the EEPROM, it can be read and written to at the I2C address 0x50.

A6A5A4A3A2A1A0Hexadecimal
10100000x50

The FMC pins of the EEPROM’s I2C bus are shown below, and it is up to the user to determine their corresponding connections to the FPGA/MPSoC on the carrier board being used.

I2C bus signalFMC pin nameFMC pin number
SCL (clock)SCLC30
SDA (data)SDAC31

FMC EEPROM Tool

The Opsero FMC EEPROM Tool can be used to verify, reprogram or update the EEPROM contents of Opsero FMC products using an FPGA or MPSoC board such as the ZCU102 or VCU118 board.

Supported boards

The tool currently supports the following FPGA/MPSoC boards. You must have at least one of these boards in order to use the tool.

Download

The tool can be downloaded at the link below:

Opsero FMC EEPROM Tool v1.5

The zip file contains a boot file (bitstream or BOOT.bin) for each of the supported boards.

Usage instructions

To run the tool, follow these steps:

  1. Plug the FMC card you wish to reprogram into one of the FMC connectors of your FPGA/MPSoC board. The tool is designed to probe all of the FMC connectors on the FPGA/MPSoC board.

  2. If you are using the ZedBoard, be sure to set the VADJ jumper setting to 1.8V. If you are using the KC705, be sure that your FMC card can support a VADJ of 2.5V, which is the default setting of that board.

  3. Connect the UART of your FPGA/MPSoC board to a PC.

  4. For Zynq and Zynq MP boards, a BOOT.bin file is provided. Copy this file to your board’s SD card and configure it to boot from SD card. Then plug the SD card back into the board and power it up.

  5. For FPGA boards, a bitstream is provided with an embedded ELF file. Power up your FPGA/MPSoC board and then download the bitstream to the FPGA board using the Vivado Hardware Manager tool.

  6. Open a terminal program such as Putty and connect to the serial port of your FPGA/MPSoC board. If you see nothing in the terminal window, press ENTER to redisplay the menu.

  7. Use the menu options to do the following:

    • Program the EEPROM (p)
      You will be asked to select the FMC product from a list, and also to enter the product’s serial number. Note that entering incorrect information here can lead to your FMC card being damaged by a VADJ voltage that is greater than it’s true rating. If you are not sure about the product to select here, please contact Opsero first.
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